Function report |
Source Code:arch\x86\kernel\cpu\mtrr\generic.c |
Create Date:2022-07-28 08:06:18 |
Last Modify:2022-05-18 17:45:43 | Copyright©Brick |
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Annotation kernel can get tool activity | Download SCCT | Chinese |
Name:Since we are disabling the cache don't allow any interrupts,* they would run extremely slow and would only increase the pain.* The caller must ensure that local interrupts are disabled and* are reenabled after post_set() has been called.
Proto:static void prepare_set(void)__acquires(set_atomicity_lock)
Type:void
Parameter:Nothing
741 | raw_spin_lock( & set_atomicity_lock) |
744 | cr0 = read_cr0() | X86_CR0_CD |
753 | If Not static_cpu_has("ss" CPU self snoop ) Then wbinvd() |
757 | If boot_cpu_has(Page Global Enable ) Then |
758 | cr4 = __read_cr4() |
759 | __write_cr4(cr4 & ~X86_CR4_PGE) |
764 | __flush_tlb() |
773 | If Not static_cpu_has("ss" CPU self snoop ) Then wbinvd() |
Name | Describe |
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mtrr_bp_pat_init | PAT setup for BP. We need to go through sync steps here |
generic_set_all | |
generic_set_mtrr | generic_set_mtrr - set variable MTRR register on the local CPU.*@reg: The register to set.*@base: The base address of the region.*@size: The size of the region. If this is 0 the region is disabled.*@type: The type of the region.* Returns nothing. |
Source code conversion tool public plug-in interface | X |
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