Function report |
Source Code:arch\x86\include\asm\special_insns.h |
Create Date:2022-07-28 05:35:01 |
Last Modify:2020-03-12 14:18:49 | Copyright©Brick |
home page | Tree |
Annotation kernel can get tool activity | Download SCCT | Chinese |
Name:write_cr0
Proto:static inline void write_cr0(unsigned long x)
Type:void
Parameter:
Type | Parameter | Name |
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unsigned long | x |
150 | native_write_cr0(x) |
Name | Describe |
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do_device_not_available | |
fpu__init_cpu_generic | Initialize the registers found in all CPUs, CR0 and CR4: |
fpu__probe_without_cpuid | |
set_cx86_memwb | |
prepare_set | Since we are disabling the cache don't allow any interrupts,* they would run extremely slow and would only increase the pain.* The caller must ensure that local interrupts are disabled and* are reenabled after post_set() has been called. |
post_set | |
prepare_set | |
post_set |
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