Function report

Linux Kernel

v5.5.9

Brick Technologies Co., Ltd

Source Code:arch\x86\kernel\cpu\resctrl\rdtgroup.c Create Date:2022-07-28 08:10:45
Last Modify:2020-03-12 14:18:49 Copyright©Brick
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Annotation kernel can get tool activityDownload SCCTChinese

Name:rdt_last_cmd_printf

Proto:void rdt_last_cmd_printf(const char *fmt, ...)

Type:void

Parameter:

TypeParameterName
const char *fmt
72  va_start(ap, fmt)
73  lockdep_assert_held( & Mutex to protect rdtgroup access. )
74  seq_buf_vprintf - sequence printing of information.*@s: seq_buf descriptor*@fmt: printf format string*@args: va_list of arguments from a printf() type function* Writes a vnprintf() format into the sequencce buffer.* Returns zero on success, -1 on overflow.
75  va_end(ap)
Caller
NameDescribe
rdtgroup_task_write_permission
rdtgroup_move_task
__init_one_rdt_domainInitialize cache resources per RDT domain* Set the RDT domain up to start off with all usable allocations. That is,* all shareable and unused bits. All-zero CBM is invalid.
bw_validate_amdCheck whether MBA bandwidth percentage value is correct. The value is* checked against the minimum and maximum bandwidth values specified by* the hardware. The allocated bandwidth percentage is rounded to the next* control step available on the hardware.
parse_bw_amd
bw_validateCheck whether MBA bandwidth percentage value is correct. The value is* checked against the minimum and max bandwidth values specified by the* hardware. The allocated bandwidth percentage is rounded to the next* control step available on the hardware.
parse_bw_intel
cbm_validate_intelCheck whether a cache bit mask is valid. The SDM says:* Please note that all (and only) contiguous '1' combinations* are allowed (e.g. FFFFH, 0FF0H, 003CH, etc.).* Additionally Haswell requires at least two bits set.
cbm_validate_amdCheck whether a cache bit mask is valid. AMD allows non-contiguous* bitmasks
parse_cbmRead one cache bit mask (hex). Check that it is valid for the current* resource type.
rdtgroup_parse_resource
rdtgroup_schemata_write
pseudo_lock_cstates_constrainpseudo_lock_cstates_constrain - Restrict cores from entering C6* To prevent the cache from being affected by power management entering* C6 has to be avoided
pseudo_lock_region_initpseudo_lock_region_init - Initialize pseudo-lock region information*@plr: pseudo-lock region* Called after user provided a schemata to be pseudo-locked. From the* schemata the &struct pseudo_lock_region is on entry already initialized
rdtgroup_pseudo_lock_createdtgroup_pseudo_lock_create - Create a pseudo-locked region*@rdtgrp: resource group to which pseudo-lock region belongs* Called when a resource group in the pseudo-locksetup mode receives a* valid schemata that should be pseudo-locked