函数源码 |
Source File:arch\x86\kernel\cpu\microcode\intel.c |
Create Date:2022-07-27 09:08:37 |
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567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 | #elsestatic inline void print_ucode(struct ucode_cpu_info *uci){ struct microcode_intel *mc; mc = uci->mc; if (!mc) return; print_ucode_info(uci, mc->hdr.date);}#endifstatic int apply_microcode_early(struct ucode_cpu_info *uci, bool early){ struct microcode_intel *mc; u32 rev; mc = uci->mc; if (!mc) return 0; /* * Save us the MSR write below - which is a particular expensive * operation - when the other hyperthread has updated the microcode * already. */ rev = intel_get_microcode_revision(); if (rev >= mc->hdr.rev) { uci->cpu_sig.rev = rev; return UCODE_OK; } /* * Writeback and invalidate caches before updating microcode to avoid * internal issues depending on what the microcode is updating. */ native_wbinvd(); /* write microcode via MSR 0x79 */ native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); rev = intel_get_microcode_revision(); if (rev != mc->hdr.rev) return -1; uci->cpu_sig.rev = rev; if (early) print_ucode(uci); else print_ucode_info(uci, mc->hdr.date); return 0;} |