Function report |
Source Code:arch\x86\kernel\cpu\mce\amd.c |
Create Date:2022-07-28 08:03:17 |
| Last Modify:2020-03-12 14:18:49 | Copyright©Brick |
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| Annotation kernel can get tool activity | Download SCCT | Chinese |
Name:Turn off thresholding banks for the following conditions:* - MC4_MISC thresholding is not supported on Family 0x15.* - Prevent possible spurious interrupts from the IF bank on Family 0x17* Models 0x10-0x2F due to Erratum #1114.
Proto:static void disable_err_thresholding(struct cpuinfo_x86 *c, unsigned int bank)
Type:void
Parameter:
| Type | Parameter | Name |
|---|---|---|
| struct cpuinfo_x86 * | c | |
| unsigned int | bank |
| 593 | If CPU family == 0x15 && bank == 4 Then |
| 597 | Else if CPU family == 0x17 && x86_model >= 0x10 && x86_model <= 0x2F Then |
| 600 | If smca_get_bank_type(bank) != SMCA_IF Then Return |
| 603 | msrs[0] = MSR_AMD64_SMCA_MCx_MISC(bank) |
| 604 | num_msrs = 1 |
| 605 | Else |
| 606 | Return |
| 609 | rdmsrl(MSR_K7_HWCR, hwcr) |
| 612 | need_toggle = Not (hwcr & BIT(18)) |
| 613 | If need_toggle Then wrmsrl(MSR_K7_HWCR, hwcr | BIT(18)) |
| 617 | When i < num_msrs cycle Clear @bit in a MSR @msr.* Retval:* < 0: An error was encountered.* = 0: Bit was already cleared.* > 0: Hardware accepted the MSR write. |
| 621 | If need_toggle Then wrmsrl(MSR_K7_HWCR, hwcr) |
| Name | Describe |
|---|---|
| mce_amd_feature_init | pu init entry point, called from mce.c with preempt off |
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