Function report

Linux Kernel

v5.5.9

Brick Technologies Co., Ltd

Source Code:arch\x86\kernel\cpu\cyrix.c Create Date:2022-07-28 07:58:50
Last Modify:2020-03-12 14:18:49 Copyright©Brick
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Name:Reset the slow-loop (SLOP) bit on the 686(L) which is set by some old* BIOSes for compatibility with DOS games. This makes the udelay loop* work correctly, and improves performance.* FIXME: our newer udelay uses the tsc. We don't need to frob with SLOP

Proto:static void check_cx686_slop(struct cpuinfo_x86 *c)

Type:void

Parameter:

TypeParameterName
struct cpuinfo_x86 *c
97  If Cx86_dir0_msb is a HACK needed by check_cx686_cpuid/slop in bugs.h in* order to identify the Cyrix CPU model after we're out of setup.c* Actually since bugs.h doesn't even reference this perhaps someone should* fix the documentation ??? == 3 Then
100  local_irq_save(flags)
101  ccr3 = NSC/Cyrix CPU indexed register access. Must be inlined instead of* macros to ensure correct access ordering* Access order is always 0x22 (=offset), 0x23 (=value)
102  setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10)
103  ccr5 = NSC/Cyrix CPU indexed register access. Must be inlined instead of* macros to ensure correct access ordering* Access order is always 0x22 (=offset), 0x23 (=value)
104  If ccr5 & 2 Then setCx86(CX86_CCR5, ccr5 & 0xfd)
106  setCx86(CX86_CCR3, ccr3)
107  local_irq_restore(flags)
109  If ccr5 & 2 Then
110  pr_info("Recalibrating delay loop with SLOP bit reset\n")
111  calibrate_delay()
Caller
NameDescribe
init_cyrix