Function report |
Source Code:arch\x86\kernel\cpu\bugs.c |
Create Date:2022-07-28 07:56:02 |
Last Modify:2020-03-12 14:18:49 | Copyright©Brick |
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Annotation kernel can get tool activity | Download SCCT | Chinese |
Name:x86_virt_spec_ctrl
Proto:void x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
Type:void
Parameter:
Type | Parameter | Name |
---|---|---|
u64 | guest_spec_ctrl | |
u64 | guest_virt_spec_ctrl | |
bool | setguest |
156 | ti = current_thread_info() |
159 | If static_cpu_has("" MSR SPEC_CTRL is implemented ) Then |
165 | guestval = hostval & ~The vendor and possibly platform specific bits which can be modified in* x86_spec_ctrl_base. |
166 | guestval |= guest_spec_ctrl & The vendor and possibly platform specific bits which can be modified in* x86_spec_ctrl_base. |
169 | If static_cpu_has("" Speculative Store Bypass Disable ) || static_cpu_has("" Speculative Store Bypass Disable ) Then hostval |= ssbd_tif_to_spec_ctrl( low level flags ) |
174 | If static_branch_unlikely( & Control conditional STIBP in switch_to() ) Then hostval |= stibp_tif_to_spec_ctrl( low level flags ) |
187 | If Not static_cpu_has("" AMD SSBD implementation via LS_CFG MSR ) && Not static_cpu_has(Virtualized Speculative Store Bypass Disable ) Then Return |
196 | If static_cpu_has("" Disable Speculative Store Bypass. ) Then hostval = Speculative Store Bypass Disable |
198 | Else hostval = ssbd_tif_to_spec_ctrl( low level flags ) |
207 | tif = If setguest Then ssbd_spec_ctrl_to_tif(guestval) Else ssbd_spec_ctrl_to_tif(hostval) |
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