Function report

Linux Kernel

v5.5.9

Brick Technologies Co., Ltd

Source Code:arch\x86\kernel\cpu\amd.c Create Date:2022-07-28 07:58:25
Last Modify:2020-03-12 14:18:49 Copyright©Brick
home page Tree
Annotation kernel can get tool activityDownload SCCTChinese

Name:init_amd

Proto:static void init_amd(struct cpuinfo_x86 *c)

Type:void

Parameter:

TypeParameterName
struct cpuinfo_x86 *c
908  early_init_amd(c)
914  clear_cpu_cap(c, 0 * 32 + 31)
916  If CPU family >= 0x10 Then set_cpu_cap(c, REP microcode works well )
920  apicid = hard_smp_processor_id()
923  If CPU family < 6 Then clear_cpu_cap(c, Machine Check Exception )
927  Case CPU family == 4
927  init_amd_k5(c)
927  Break
928  Case CPU family == 5
928  init_amd_k6(c)
928  Break
929  Case CPU family == 6
929  init_amd_k7(c)
929  Break
930  Case CPU family == 0xf
930  init_amd_k8(c)
930  Break
931  Case CPU family == 0x10
931  init_amd_gh(c)
931  Break
932  Case CPU family == 0x12
932  init_amd_ln(c)
932  Break
933  Case CPU family == 0x15
933  init_amd_bd(c)
933  Break
934  Case CPU family == 0x16
934  init_amd_jg(c)
934  Break
935  Case CPU family == 0x17
935  init_amd_zn(c)
935  Break
942  If CPU family >= 6 && Not cpu_has(c, Always save/restore FP error pointers ) Then set_cpu_bug(c, FXSAVE leaks FOP/FIP/FOP )
945  cpu_detect_cache_sizes(c)
947  On a AMD dual core setup the lower bits of the APIC id distinguish the cores.* Assumes number of cores is a power of two.
948  Fixup core topology information for* (1) AMD multi-node processors* Assumption: Number of cores in each internal node is the same.* (2) AMD processors supporting compute units
949  srat_detect_node(c)
951  init_amd_cacheinfo(c)
953  If cpu_has(c, "sse2" ) Then
960  Set @bit in a MSR @msr.* Retval:* < 0: An error was encountered.* = 0: Bit was already set.* > 0: Hardware accepted the MSR write.
964  set_cpu_cap(c, "" LFENCE synchronizes RDTSC )
971  If CPU family > 0x11 Then set_cpu_cap(c, Always Running APIC Timer )
975  If Not cpu_has(c, 3DNow prefetch instructions ) Then If cpu_has(c, 3DNow ) || cpu_has(c, Long Mode (x86-64, 64-bit support) ) Then
977  set_cpu_cap(c, 3DNow prefetch instructions )
980  If Not cpu_has(c, "" Xen paravirtual guest ) Then set_cpu_bug(c, SYSRET doesn't fix up SS attrs )
988  If cpu_has(c, Instructions Retired Count ) && Not cpu_has_amd_erratum(c, amd_erratum_1054) Then Set @bit in a MSR @msr.* Retval:* < 0: An error was encountered.* = 0: Bit was already set.* > 0: Hardware accepted the MSR write.