Function report

Linux Kernel

v5.5.9

Brick Technologies Co., Ltd

Source Code:arch\x86\kernel\cpu\amd.c Create Date:2022-07-28 07:58:17
Last Modify:2020-03-12 14:18:49 Copyright©Brick
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Name:bsp_init_amd

Proto:static void bsp_init_amd(struct cpuinfo_x86 *c)

Type:void

Parameter:

TypeParameterName
struct cpuinfo_x86 *c
497  If CPU family >= 0xf Then
505  If Not rdmsrl_safe(MSR_K8_TSEG_ADDR, & tseg) Then
506  pfn = tseg >> PAGE_SHIFT determines the page size
508  pr_debug("tseg: %010llx\n", tseg)
509  If pfn_range_is_mapped(pfn, pfn + 1) Then set_memory_4k((unsignedlong)__va(tseg), 1)
515  If cpu_has(c, TSC ticks at a constant rate ) Then
517  If CPU family > 0x10 || CPU family == 0x10 && x86_model >= 0x2 Then
521  rdmsrl(MSR_K7_HWCR, val)
522  If Not (val & BIT(24)) Then pr_warn(FW_BUG* Add this to a message where you are sure the firmware is buggy or behaves* really stupid or out of spec"TSC doesn't count with P0 frequency!\n")
527  If CPU family == 0x15 Then
531  cpuid = cpuid_edx(0x80000005)
532  assoc = cpuid >> 16 & 0xff
533  upperbit = ( cpuid >> 24 << 10) / assoc
535  mask = upperbit - 1 & PAGE_MASK
536  flags = ALIGN_VA_32 | ALIGN_VA_64
539  bits = get_random_int() & mask
542  If cpu_has(c, MWAIT extension (MONITORX/MWAITX instructions) ) Then use_mwaitx_delay()
545  If boot_cpu_has(Topology extensions CPUID leafs ) Then
548  ecx = cpuid_ecx(0x8000001e)
549  des_per_socket: Stores the number of nodes per socket.* Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX* Node Identifiers[10:8] = ( ecx >> 8 & 7) + 1
550  Else if boot_cpu_has(NodeId MSR ) Then
553  rdmsrl(MSR_FAM10H_NODE_ID, value)
554  des_per_socket: Stores the number of nodes per socket.* Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX* Node Identifiers[10:8] = ( value >> 3 & 7) + 1
557  If Not boot_cpu_has("" Speculative Store Bypass Disable ) && Not boot_cpu_has(Virtualized Speculative Store Bypass Disable ) && CPU family >= 0x15 && CPU family <= 0x17 Then
563  Case CPU family == 0x15
563  bit = 54
563  Break
564  Case CPU family == 0x16
564  bit = 33
564  Break
565  Case CPU family == 0x17
565  bit = 10
565  Break
566  Default
566  Return
572  If Not rdmsrl_safe(MSR_AMD64_LS_CFG, & AMD specific MSR info for Speculative Store Bypass control.* x86_amd_ls_cfg_ssbd_mask is initialized in identify_boot_cpu().) Then
573  setup_force_cpu_cap("" AMD SSBD implementation via LS_CFG MSR )
574  setup_force_cpu_cap(Speculative Store Bypass Disable )
575  x86_amd_ls_cfg_ssbd_mask = 1ULL << bit