Function report |
Source Code:arch\x86\boot\boot.h |
Create Date:2022-07-28 07:26:17 |
| Last Modify:2020-03-12 14:18:49 | Copyright©Brick |
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| Annotation kernel can get tool activity | Download SCCT | Chinese |
Name:Basic port I/O
Proto:static inline void outb(u8 v, u16 port)
Type:void
Parameter:
| Type | Parameter | Name |
|---|---|---|
| u8 | v | |
| u16 | port |
| 41 | asm volatile |
| Name | Describe |
|---|---|
| enable_a20_kbc | |
| enable_a20_fast | |
| early_serial_init | |
| probe_baud | |
| realmode_switch_hook | Invoke the realmode switch hook if present; otherwise* disable all interrupts. |
| mask_all_interrupts | Disable all interrupts at the legacy PIC. |
| reset_coprocessor | Reset IGNNE# if asserted in the FPU. |
| serial_putchar | These functions are in .inittext so they can be used to signal* error during initialization. |
| vga_set_480_scanlines | |
| io_check_error | |
| mask_8259A_irq | |
| unmask_8259A_irq | |
| i8259A_irq_real | This function assumes to be called rarely. Switching between* 8259A registers is slow.* This has to be protected by the irq controller spinlock* before being called. |
| mask_and_ack_8259A | Careful! The 8259A is a fragile beast, it pretty* much _has_ to be done exactly like this (mask it* first, _then_ send the EOI, and the order of EOI* to the two 8259s is important! |
| restore_ELCR | ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ |
| i8259A_shutdown | |
| mask_8259A | |
| unmask_8259A | |
| probe_8259A | |
| init_8259A | This is the 'legacy' 8259A Programmable Interrupt Controller,* present in the majority of PC/AT boxes.* plus some generic x86 specific things if generic specifics makes* any sense at all. |
| pit_calibrate_tsc | Try to calibrate the TSC against the Programmable* Interrupt Timer and return the frequency of the TSC* in kHz.* Return ULONG_MAX on failure to calibrate. |
| quick_pit_calibrate | |
| rtc_cmos_read | Routines for accessing the CMOS RAM/RTC. |
| rtc_cmos_write | |
| acpi_pic_sci_set_trigger | acpi_pic_sci_set_trigger()* use ELCR to set PIC-mode trigger type for SCI* If a PIC-mode SCI is not recognized or gives spurious IRQ7's* it may require Edge Trigger -- use "acpi_sci=edge"* Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control |
| native_machine_emergency_restart | To the best of our knowledge Windows compatible x86 hardware expects* the following on reboot:* 1) If the FADT has the ACPI reboot register flag set, try it* 2) If still alive, write to the keyboard controller* 3) If still alive, write to the ACPI reboot |
| imcr_pic_to_apic | Handle interrupt mode configuration register (IMCR) |
| imcr_apic_to_pic | |
| print_PIC | |
| rdc321x_reset | |
| ce4100_reset | |
| io_serial_out | |
| in_idx | Accessing VGA indexed registers |
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